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NVMeG3 IP coreNVMe PCIe Gen3 SSD is available!!

Features┃Block diagram┃Document Download┃Applications
NVMe-IP

NVMeG3 IP with PCIe Gen3 Soft IP enable the NVMe SSD interface for non-embedded PCIe Gen3 Hard IP Devices. Break the barriers of NVMe interface, Allow to build multi-channel RAID system with very high performance and lowest possible FPGA resources consumption.
This IP core license includes the reference design for Altera FPGA boards. It helps you to reduce development time and cost.

No CPU/DDR required
Standard Type		 No PCIe Hard IP required >500K IOPS random write access Multi user simultaneously access Random Access By Multiple Users
NVMe IP NVMeG4 IP raNVMe IP muNVMe IP rmNVMe IP
NVMe-IP core series Selection Guide to choose suitable solution

Features

  • Implement application layer, transaction layer,data link layer, and some parts of physical layer to access NVMe Gen3 SSD without CPU usage
  • Operate with Altera PCIe PHY IP, configured as 4-lane PCIe Gen3 (256-bit bus interface)
  • Include 256 Kbyte RAM to be data buffer
  • Simple user control I/F and FIFO interface for data port
  • Direct connect to Integrated Block for PCI Express from Altera by using 128-bit bus interface
  • Support 6 commands, i.e. IDENTIFY, WRITE, READ, Shutdown, SMART, and Flush
  • Support NVMe device
    • Base Class Code 01h (mass storage), Sub Class code 08h (Non-volatile), Programming Interface 02h (NVMHCI)
    • MPSMIN (Memory Page Size Minimum): 0 (4Kbyte)
    • MDTS (Maximum Data Transfer Size): 0 (no limitation) or at least 5 (128 Kbyte)
    • LBA unit: 512 byte or 4096 byte
  • exFAT & FAT32 file system management without CPU usage (Option)
  • Support PCIe Switch (Customize support, please ask us)
  • Reference design with AB18-PCIeX16 or AB17-M2FMC adapter board available on Altera FPGA boards
    Available on Mouser

Block diagram


* Click to View

Document download

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Technical document update page

Common Documents

Document name Revision
NVMe-IP core Leaflet Rev2.3
NVMe-IP核 Rev2.4CA (中文)
NVMe-IP core Presentation Rev2.3EA

Documents for each Device families

Document name Arria 10 GX
NVMeG3-IP with PCIe Gen3 Soft-IP NVMeG3-IP Datasheet Rev1.1
Reference Design Document Rev1.0
Demo Instruction Document Rev4.05
FPGA Setup Document Rev4.2
Free Evaluation demo file Arria 10 GX
Demo Video


Accessories for evaluation

Accessories for evaluation Description
AB18-PCIeX16 PCIe x16 Lanes Crossover adapter board for NVMe-IP evaluation
Download manual
Purchase

About price and licence of this IP core, please contact Design Gateway.

Application example

NVMeG3-IP core is the best solution for applications which requires huge data transmission with high-speed.
Surveillance Camera Data Logger Video Editing System Medical Image Analysis Aerospace & Defense

Articles




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